The evolution of technological processes and the ever-increasing complexity of electronic systems are establishing a demand for very high density, non-volatile semiconductor memories (multi-megabit memories). The state of the art provides so-called multi-level memories wherein each memory cell is used for storing more than one information bit.
EPROM, EEPROM and FLASH EEPROM cells can be programmed by fine control of the charge injected to the floating gate so as to obtain a range of threshold voltages, as disclosed in U.S. Pat. No. 4,964,079 entitled "Electrically Programmable Memory with Several Information Bits Per Cell" to Jean Devin, SGS-THOMSON MICROELECTRONICS. A non-volatile cell with four threshold voltages, for example, can store two bits, while a cell with 16 different threshold values can store as many as four bits. For a given area, therefore, a device with multi-level memory cells can contain two or four times as much information. In fact, in non-volatile memories, the cell array forms a major portion of the device.
Several references have shown that non-volatile memories with two bits per cell, i.e., four levels of memories, are a practical possibility. One example is offered by T. S. Jung et al., "A 3.3V 128 Mb Multi-Level NAND Flash Memory for Mass Storage Applications", Proc. IEEE Int. Solid-State Circuits Conf., 1996, pages 32-33.
A current trend is toward providing a larger number of levels, such as, sixteen levels or even a full byte per cell. For an effective memory organization, it is better if an even number of bits can be stored in each cell.
To implement an increased number of levels per cell, such as sixteen or as many as 256 levels, far more stringent requirements must be met than those for conventional two-level memories. These requirements involve both technological and reliability aspects, such as the distribution of the threshold voltages, retention over time, and immunity to read/program disturbance, and design aspects, such as special read and program architectures.
For a given technology, the design aspects are most definitely critical, in that the design aspects actually impose restrictions on the maximum number of levels that can be stored and read reliably. In particular, it has been shown that the threshold voltage distribution width of a non-volatile cell is heavily dependent on the program algorithm. Accordingly, the allocation of a larger number of levels than four to a predetermined voltage (or current) window is limited to a large extent by the program circuitry.
Program algorithms are usually on-chip implementations, whereby the storage circuit can be programmed by the user on suitable programming equipment, such as EPROM programmers. In addition, to have the cells programmed accurately, it is best if an adaptive algorithm can be used in which each word cell is programmed and verified separately.
The design difficulties to be addressed in implementing circuitry for on-chip adaptive multi-level programming, i.e., a fully integrated circuitry, are considerable, especially in programming cells with 16-plus levels in any reliable manner.
Multiple levels ROMs (Read Only Memories) have also been developed which utilize special memory cells and appropriate multi-level reading arrangements. All such memories are, as is normal with ROMs, factory-programmed by the maker of the storage device and cannot later be modified by the user. The threshold voltage of the individual cells is varied at the masking stage of the ROM by controlling the amount of charge implanted in the channel regions. It will be appreciated that this can only be accomplished by introducing some additional process steps in the device fabrication cycle, which entails increased complexity and manufacturing costs.
The underlying technical problem of this invention is to provide an OTP (One-Time Programmable) EPROM storage device which is non-erasable and intended for read-only applications, has a very high integration density, and exhibits such constructional and functional features as to allow of programming with a large number of levels per cell, thereby to overcome the aforementioned limitations from the state of the art.